Chapter 8 - Input/Output. The main contents of this chapter include all of the following: I/O basics; input from the keyboard; output to the monitor; a more sophisticated input routine; interrupt-driven I/O; implementation of memory-mapped I/O, revisited. | Chapter 8 Input/Output I/O basics Keyboard input Monitor output Interrupt driven I/O DMA I/O Basics Definitions Input transfer data from the outside world to the computer: keyboard, mouse, scanner, bar-code reader, etc. Output transfer data from the computer to the outside: monitor, printer, LED display, etc. Peripheral: any I/O device, including disks. LC-3 supports only a keyboard and a monitor 8 - Device Registers I/O Interface Through a set of Device Registers: Status register (device is busy/idle/error) Data register (data to be moved to/from device) The device registers have to be read/written by the CPU. LC-3 KBDR: keyboard data register KBSR: keyboard status register DDR: display data register DSR: display status register KBSR[15] - keyboard ready (new character available) KBDR[7:0] - character typed (ASCII) DSR[15] - monitor ready DDR[7:0] - character to be displayed (ASCII) LC-3 KBSR KBDR DSR DDR 8 - Addressing Device Registers Special I/O Instructions Read or write to device registers using specialized I/O instructions. Memory Mapped I/O Use existing data movement instructions (Load & Store). Map each device register to a memory address (fixed). CPU communicates with the device registers as if they were memory locations. LC-3 Uses memory mapped I/O: xFE00 KBSR Keyboard Status Register xFE02 KBDR Keyboard Data Register XFE04 DSR Display Status Register XFE06 DDR Display Data Register XFFFE MCR Machine Control Register 8 - Memory-mapped Input 8 - Memory-mapped Output 8 - Synchronizing CPU and I/O Problem Speed mismatch between CPU and I/O: CPU runs at up to 2 GHz, while all I/O is much slower. Example : Keyboard input is both slow, and irregular. We need a protocol to keep CPU & KBD synchronized. Two possible solutions: Polling (handshake synchronization) Interrupt-driven I/O 8 - Synchronizing CPU and I/O - 2 Polling, or handshake synchronization CPU checks the KBD Ready status bit. If set, CPU reads the data register and resets the | Chapter 8 Input/Output I/O basics Keyboard input Monitor output Interrupt driven I/O DMA I/O Basics Definitions Input transfer data from the outside world to the computer: keyboard, mouse, scanner, bar-code reader, etc. Output transfer data from the computer to the outside: monitor, printer, LED display, etc. Peripheral: any I/O device, including disks. LC-3 supports only a keyboard and a monitor 8 - Device Registers I/O Interface Through a set of Device Registers: Status register (device is busy/idle/error) Data register (data to be moved to/from device) The device registers have to be read/written by the CPU. LC-3 KBDR: keyboard data register KBSR: keyboard status register DDR: display data register DSR: display status register KBSR[15] - keyboard ready (new character available) KBDR[7:0] - character typed (ASCII) DSR[15] - monitor ready DDR[7:0] - character to be displayed (ASCII) LC-3 KBSR KBDR DSR DDR 8 - Addressing Device Registers Special I/O Instructions Read or write