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Báo cáo hóa học: " Rapid Prototyping of Field Programmable Gate Array-Based Discrete Cosine Transform Approximations"

Tuyển tập báo cáo các nghiên cứu khoa học quốc tế ngành hóa học dành cho các bạn yêu hóa học tham khảo đề tài: Rapid Prototyping of Field Programmable Gate Array-Based Discrete Cosine Transform Approximations | EURASIP Journal on Applied Signal Processing 2003 6 543-554 2003 Hindawi Publishing Corporation Rapid Prototyping of Field Programmable Gate Array-Based Discrete Cosine Transform Approximations TrevorW. Fox Department of Electrical and Computer Engineering University of Calgary 2500 University Drive N.W. Calgary Alberta Canada T2N1N4 Email fox@enel.ucalgary.ca Laurence E. Turner Department of Electrical and Computer Engineering University of Calgary 2500 University Drive N.W Calgary Alberta Canada T2N1N4 Email turner@enel.ucalgary.ca Received 28 February 2002 and in revised form 15 October 2002 A method for the rapid design of field programmable gate array FPGA -based discrete cosine transform DCT approximations is presented that can be used to control the coding gain mean square error MSE quantization noise hardware cost and power consumption by optimizing the coefficient values and datapath wordlengths. Previous DCT design methods can only control the quality of the DCT approximation and estimates of the hardware cost by optimizing the coefficient values. It is shown that it is possible to rapidly prototype FPGA-based DCT approximations with near optimal coding gains that satisfy the MSE hardware cost quantization noise and power consumption specifications. Keywords and phrases DCT low-power FPGA binDCT. 1. INTRODUCTION The discrete cosine transform DCT has found wide application in audio image and video compression and has been incorporated in the popular JPEG MPEG and H.26x standards 1 . The phenomenal growth in the demand for products that use these compression standards has increased the need to develop a rapid prototyping method for hardwarebased DCT approximations. Rapid prototyping design methods reduce the time necessary to demonstrate that a complex design is feasible and worth pursuing. The number of logic resources and the speed of field programmable gate arrays FPGAs have increased dramatically while the cost has diminished considerably. Designs can .