Khối logic lập trình Thực hiện logic tổ hợp và tuần tự Dây kết nối lập trình để kết nối đầu vào và đầu ra khối logic Ngăn chặn các khối I / O lập trình logic đặc biệt tại các vùng ngoại vi của thiết bị cho các kết nối bên ngoài | ELEC-2005 Electronics in High Energy Physics Winter Term: Introduction to Electronics in HEP Field Programmable Gate Arrays Part 1 Stefan Haas CERN Technical Training 2005 Part 2 VHDL Introduction Examples Design Flow Entry Methods Simulation Synthesis Place & Route IP Cores CERN Tools & Support Part 1 Programmable Logic CPLD FPGA Architecture Examples Features Vendors and Devices coffee break Outline Stefan Haas, 1 Feb. 2005 Programmable Logic Programmable Logic Programmable digital integrated circuit Standard off-the-shelf parts Desired functionality is implemented by configuring on-chip logic blocks and interconnections Advantages (compared to an ASIC): Low development costs Short development cycle Device can (usually) be reprogrammed Types of programmable logic: Complex PLDs (CPLD) Field programmable Gate Arrays (FPGA) Stefan Haas, 1 Feb. 2005 CPLD Architecture and Examples PLD - Sum of Products A B C AND plane Programmable AND array followed by fixed fan-in OR gates Programmable switch or fuse Stefan Haas, 1 Feb. 2005 PLD - Macrocell Can implement combinational or sequential logic A B C Flip-flop Select Enable D Q Clock AND plane MUX Stefan Haas, 1 Feb. 2005 The addition of a flip-flop and multiplexer allows implementation of both combinational and sequential logic. MUX selects combinational or sequential logic The output can be feed back into AND plane to be used as input to other cells. This allows the implementation of circuits that have multiple stages of logic gates and registers. CPLD Structure Integration of several PLD blocks with a programmable interconnect on a single chip PLD Block PLD Block Interconnection Matrix I/O Block I/O Block PLD Block PLD Block I/O Block I/O Block Interconnection Matrix Stefan Haas, 1 Feb. 2005 Basic PLDs can only implement designs of fairly modest sizes. The basic concept of a CPLD is many PLD blocks resident in one device with a high level of programmable connectivity CPLD Example - | ELEC-2005 Electronics in High Energy Physics Winter Term: Introduction to Electronics in HEP Field Programmable Gate Arrays Part 1 Stefan Haas CERN Technical Training 2005 Part 2 VHDL Introduction Examples Design Flow Entry Methods Simulation Synthesis Place & Route IP Cores CERN Tools & Support Part 1 Programmable Logic CPLD FPGA Architecture Examples Features Vendors and Devices coffee break Outline Stefan Haas, 1 Feb. 2005 Programmable Logic Programmable Logic Programmable digital integrated circuit Standard off-the-shelf parts Desired functionality is implemented by configuring on-chip logic blocks and interconnections Advantages (compared to an ASIC): Low development costs Short development cycle Device can (usually) be reprogrammed Types of programmable logic: Complex PLDs (CPLD) Field programmable Gate Arrays (FPGA) Stefan Haas, 1 Feb. 2005 CPLD Architecture and Examples PLD - Sum of Products A B C AND plane Programmable AND array followed by fixed .
