Tuyển tập các báo cáo nghiên cứu về hóa học được đăng trên tạp chí hóa hoc quốc tế đề tài : Pipeline synthesis and optimization of FPGAbased video processing applications with CAL | Ab Rahman et al. EURASIP Journal on Image and Video Processing 2011 2011 19 http content 2011 1 19 D EURASIP Journal on Image and Video Processing a SpringerOpen Journal RESEARCH Open Access Pipeline synthesis and optimization of FPGA-based video processing applications with CAL Ab Al-Hadi Ab Rahman Anatoly Prihozhy and Marco Mattavelli Abstract This article describes a pipeline synthesis and optimization technique that increases data throughput of FPGA-based system using minimum pipeline resources. The technique is applied on CAL dataflow language and designed based on relations matrices and graphs. First the initial as-soon-as-possible ASAP and as-late-as-possible ALAP schedules and the corresponding mobility of operators are generated. From this operator coloring technique is used on conflict and nonconflict directed graphs using recursive functions and explicit stack mechanisms. For each feasible number of pipeline stages a pipeline schedule with minimum total register width is taken as an optimal coloring which is then automatically transformed to a description in CAL. The generated pipelined CAL descriptions are finally synthesized to hardware description languages for FPGA implementation. Experimental results of three video processing applications demonstrate up to higher throughput for pipelined compared to non-pipelined implementations and average total pipeline register width reduction of up to and between the optimal and ASAP and ALAP pipeline schedules respectively. 1 Introduction Data throughput is one of the most important parameters in video processing systems. It is essentially a measure of how fast data passes from input to output of a system. With increasing demands for larger resolution images faster frame rates and more processing requirements through advanced algorithms it is becoming a major challenge to meet the ever-increasing desirable throughput. For algorithms that can be performed in parallel such
