Tuyển tập báo cáo các nghiên cứu khoa học quốc tế ngành hóa học dành cho các bạn yêu hóa học tham khảo đề tài: Record Endurance for Single-Walled Carbon Nanotube–Based Memory Cell | Nanoscale Res Lett 2010 5 1852-1855 DOI s11671-010-9727-6 NANO EXPRESS Record Endurance for Single-Walled Carbon Nanotube-Based Memory Cell A. Di Bartolomeo Y. Yang M. B. M. Rinzan A. K. Boyd P. Barbara Received 3 July 2010 Accepted 2 August 2010 Published online 14 August 2010 The Author s 2010. This article is published with open access at Abstract We study memory devices consisting of singlewalled carbon nanotube transistors with charge storage at the SiO2 nanotube interface. We show that this type of memory device is robust withstanding over 105 operating cycles with a current drive capability up to 10-6 A at 20 mV drain bias thus competing with state-of-the-art Si-devices. We find that the device performance depends on temperature and pressure while both endurance and data retention are improved in vacuum. Keywords Carbon nanotube Field-effect transistor Memory Hysteresis Endurance Data retention In this paper we study CNFETs where the single-walled carbon nanotube SWCNT has highly transparent contacts to the source and drain electrodes. We show that such transistors can work as memory devices with durability under continuous operation matching or outperforming endurance of Si-devices available on the market. The devices studied exhibit improved durability and charge retention at low temperature and low pressure. Measurements at room temperature show that such robust operation can be achieved also under ambient condition without any passivation layer to protect the device from exposure to environment. Introduction Carbon nanotube field-effect transistors CNFETs and their novel electronic properties have been the focus of intense research in the past few years 1 2 . A key feature of these devices is the presence of large hysteresis in their transfer characteristics IDS-VGS curves between forward and reverse gate sweeps. The hysteresis highly depends on the experimental and the environment parameters such as the gate bias range gate .
