Biomedical Engineering 2012 Part 2

Tham khảo tài liệu 'biomedical engineering 2012 part 2', kỹ thuật - công nghệ, cơ khí - chế tạo máy phục vụ nhu cầu học tập, nghiên cứu và làm việc hiệu quả | 32 Biomedical Engineering 3. Critical design parameter of the quantizer implemented by means of comparators must be considered. The speed of the comparator must be high enough for the desired sampling rate and input offset input referred noise and hysteresis must be low enough to not degrade the ADC performance. ADC architecture and building blocks. The second ADC implementation that is described in this chapter for EEG purposes is a 10-bit SC-EA modulator operating with a sampling frequency of kHz and a full-scale range of V Lopez-Morillo et al. 2008 . A simple and power efficient architecture for high resolution ADCs in the range of biomedical signals is the classical second-order EA modulator Fig. 9 . The main advantages of this architecture are simplicity low sensitivity to component mismatch and stability. System simulations have been performed using MATLAB SIMULINK based on the models developed on Boser Wooley 1988 and Rabii Wooly 1999 . As a result of these simulations including the main non-idealities such as finite DC gain bandwidth and slewrate of the amplifiers a set of specifications for the most important building blocks have been obtained. These specifications are summarized in Table 2. General Specifications Oversampling ratio 64 Sampling frequency Integrators coefficients a1 b1 a2 b2 First integrator s opamp Output-Swing 2Vpp Slew-rate SR 15V ms Unity-gain frequency 8kHz DC gain 30dB Clock Jitter Capacitor values Cs1 125fF Ccds 500fF Ci1 500fF Cs2 50fF Ci2 200fF Table 4. Specifications for building blocks. Behavioral simulations show a Dynamic Range DR of 72dB with an oversampling ratio of 64 which is enough to achieve the 10 bit resolution. In order to get an unconditionally stable modulator and to maximize the integrators output swing the coefficients have been chosen as a1 b1 b2 and a2 Rabii Wooly 1999 . Low-Power and Low-Voltage Analog-to-Digital Converters for wearable EEG systems 33 Fig. 10.

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