Tham khảo tài liệu 'new developments in biomedical engineering 2011 part 8', kỹ thuật - công nghệ, cơ khí - chế tạo máy phục vụ nhu cầu học tập, nghiên cứu và làm việc hiệu quả | 272 New Developments in Biomedical Engineering The operational transconductance amplifier employed has the schematic in Fig. 12. The cascode output stage has been chosen to reduce the load effect due to large ohmic values in loads Zxo . Typical output resistances for cascode output stages are bigger than 100MQ so errors expected due to load resistance effects will be small. Fig. 12. Operational Transconductance Amplifier OTA CMOS schematic. Comparator The voltage comparator selected is shown in Fig. 13. A chain of inverters have been added at its output for fast response and regeneration of digital levels. VDD Fig. 13. Comparator schematic. With the data employed the voltage applied to load composed by the measurement set-up and load under test Vx has amplitude of 8mV. In electrode based measures Vxo has typically low and limited values tens of mV to control its expected electrical performance Borkholder 1998 to secure a non-polarisable performance of the interface between an electrode and the electrolyte or biological material in contact with it. This condition can be preserved by design thanks to the voltage limitation imposed by the Pstat operation mode. System Limitations Due to the high gain of the loop for satisfying the condition in eq. 3 it is necessary to study the stability of the system. In steady-state operation eventual changes produced at the load 273 A Closed-Loop Method for Bio-Impedance Measurement with Application to Four and Two-Electrode Sensor Systems can generate variations at the rectifier output voltage that will be amplified aea times. If AVdc is only 1 mV changes at the error amplifier output voltage will be large of 500mV for aea 500 leading to out-of-range for some circuits. To avoid this some control mechanisms should be included in the loop. We propose to use a first order low-pass filter at the error amplifier output. This LPF circuit shown in Fig. 14 acts as a delay element avoiding an excessively fast response in the loop
