Tuyển tập báo cáo các nghiên cứu khoa học quốc tế ngành hóa học dành cho các bạn yêu hóa học tham khảo đề tài: Rapid VLIW Processor Customization for Signal Processing Applications Using Combinational Hardware Functions | Hindawi Publishing Corporation EURASIP Journal on Applied Signal Processing Volume 2006 Article ID 46472 Pages 1-23 DOI ASP 2006 46472 Rapid VLIW Processor Customization for Signal Processing Applications Using Combinational Hardware Functions Raymond R. Hoare Alex K. Jones Dara Kusic Joshua Fazekas John Foster Shenchih Tung and Michael McCloud Department of Electrical and Computer Engineering University of Pittsburgh Pittsburgh PA 15261 USA Received 12 October 2004 Revised 30 June 2005 Accepted 12 July 2005 This paper presents an architecture that combines VLIW very long instruction word processing with the capability to introduce application-specific customized instructions and highly parallel combinational hardware functions for the acceleration of signal processing applications. To support this architecture a compilation and design automation flow is described for algorithms written in C. The key contributions of this paper are as follows 1 a 4-way VLIW processor implemented in an FPGA 2 large speedups through hardware functions 3 a hardware software interface with zero overhead 4 a design methodology for implementing signal processing applications on this architecture 5 tractable design automation techniques for extracting and synthesizing hardware functions. Several design tradeoffs for the architecture were examined including the number of VLIW functional units and register file size. The architecture was implemented on an Altera Stratix II FPGA. The Stratix II device was selected because it offers a large number of high-speed DSP digital signal processing blocks that execute multiply-accumulate operations. Using the MediaBench benchmark suite we tested our methodology and architecture to accelerate software. Our combined VLIW processor with hardware functions was compared to that of software executing on a RISC processor specifically the soft core embedded NIOS II processor. For software kernels converted into hardware functions we show a hardware .
