The first reported CMOS-MEMS processes produce microstructural sidewalls by stacking the drain/source con- tact cut and metal via cuts in the CMOS and removing the metallization layers above the cuts [13]. The substrate is exposed in the cut regions. A wet or dry isotropic silicon etch undercuts and releases the microstructures. Gaps between microstructures are limited to several microns because of artifacts in the etch pits from etching metal above the CMOS contacts. Such microstructures are com- monly used to make thermally isolated and vertically actu- ated structures integrated with electronics. A modification of the original CMOS-MEMS process is shown in Figure 10 [14]. The first post-CMOS microma- chining step is a.
