5 interrupt sources: 2 external, 2 timer, a serial port - 2 programmable interrupt priority levels - fixed interrupt polling sequence - can be enabled or disabled - IE (A8H), IP (B8H) for controlling interrupts | Interrupt Interrupts of 8051 Introduction 8051 Interrupt organization Processing Interrupts Program Design Using Interrupts Timer Interrupts Serial Port Interrupts External Interrupts Interrupt Timings Interrupt An interrupt is the occurrence of a condition--an event -- that cause a temporary suspension of a program while the event is serviced by another program (Interrupt Service Routine ISR or Interrupt Handler). Interrupt-Driven System-- gives the illusion of doing many things simultaneously, quick response to events, suitable for real-time control application. 8051 Interrupt Organization 5 interrupt sources: 2 external, 2 timer, a serial port 2 programmable interrupt priority levels fixed interrupt polling sequence can be enabled or disabled IE (A8H), IP (B8H) for controlling interrupts Enabling and Disabling Interrupts IE (Interrupt Enable Register A8H) Bit Symbol Bit Address Description (1=enable, 0=disable) EA AFH Global enable/disable - AEH Undefined ET2 ADH . | Interrupt Interrupts of 8051 Introduction 8051 Interrupt organization Processing Interrupts Program Design Using Interrupts Timer Interrupts Serial Port Interrupts External Interrupts Interrupt Timings Interrupt An interrupt is the occurrence of a condition--an event -- that cause a temporary suspension of a program while the event is serviced by another program (Interrupt Service Routine ISR or Interrupt Handler). Interrupt-Driven System-- gives the illusion of doing many things simultaneously, quick response to events, suitable for real-time control application. 8051 Interrupt Organization 5 interrupt sources: 2 external, 2 timer, a serial port 2 programmable interrupt priority levels fixed interrupt polling sequence can be enabled or disabled IE (A8H), IP (B8H) for controlling interrupts Enabling and Disabling Interrupts IE (Interrupt Enable Register A8H) Bit Symbol Bit Address Description (1=enable, 0=disable) EA AFH Global enable/disable - AEH Undefined ET2 ADH Enable timer 2 interrupt (8052) ES ACH Enable serial port interrupt ET1 ABH Enable timer 1 interrupt EX1 AAH Enable external 1 interrupt ET0 A9H Enable timer 0 interrupt EX0 A8H Enable external 0 interrupt Two bits must be set to enable any interrupt: the individual enable bit and global enable bit SETB ET1 SETB EA MOV IE,#10001000B Interrupt Priority (IP, B8H) Bit Symbol Bit Address Description (1=high, 0=low priority) - - Undefined - - Undefined PT2 BDH Priority for timer 2 interrupt (8052) PS BCH Priority for serial port interrupt PT1 BBH Priority for timer 1 interrupt PX1 BAH Priority for external 1 interrupt PT0 B9H Priority for timer 0 interrupt PX0 B8H Priority for external 0 interrupt 0= lower priority, 1= higher priority, reset IP=00H Lower priority ISR can be interrupted by a high priority interrupt. A high priority ISR can not be interrupted. Interrupt Flag Bits Interrupt Flag SFR Register & Bit Position .
