This is the fourth version of the book and this version now not only provides VHDL language coverage but design methodology information as well. This version will guide the reader through the process of creating a VHDL design, simulating the design, synthesizing the design, placing and routing the design, using VITAL simulation to verify the final result, and a new technique called At-Speed debugging that provides extremely fast design verification. The design example in this version has been updated to reflect the new focus on the design methodology | CD-ROM Included JVJH DL VHDL Programming by Example Douglas L. Perry Fourth Edition McGraw-Hill New York Chicago San Francisco Lisbon London Madrid Mexico City Milan New Delhi San Juan Seoul Singapore Sydney Toronto ffl CONTENTS Foreword xiii Preface xv Acknowledgments xviii Chapter 1 Introduction to VHDL 1 VHDL Terms 2 Describing Hardware in VHDL 3 Entity 3 Architectures 4 Concurrent Signal Assignment 5 Event Scheduling 6 Statement Concurrency 6 Structural Designs 7 Sequential Behavior 8 Process Statements 9 Process Declarative Region 9 Process Statement Part 9 Process Execution 10 Sequential Statements 10 Architecture Selection 11 Configuration Statements 11 Power of Configurations 12 Chapter 2 Behavioral Modeling 15 Introduction to Behavioral Modeling 16 Transport Versus Inertial Delay 20 Inertial Delay 20 Transport Delay 21 Inertial Delay Model 22 Transport Delay Model 23 Simulation Deltas 23 Drivers 27 Driver Creation 27 Bad Multiple Driver Model 28 Generics 29 Block Statements 31 Guarded Blocks .
