Review ATA - IDE Interface register definition and descriptions, Command descriptions, PIO Protocol, Ultra DMA Protocol, DMA Protocol, Advanced Technology Attachment, Integrated Drive Electronics, Programmed Input/Output. | Review ATA - IDE Project name : ATA – IDE Training Engineer : Minh Nguyen Interface register definition and descriptions • • Alternate Status Register. • • Command Register. • • Cylinder High Register. • Cylinder Low Register. • • • Data Register. • • Device Control Register. Device/Head Register. Error Register. Feature Register. Sector Count Register. Sector Number Register. Status Register Overview • • • • • • • • ATA - Advanced Technology Attachment IDE - Integrated Drive Electronics PIO - Programmed Input/Output DMA – Direct Memory Access LBA – Logical Block Address CFA – Compact Flash Association CHS – Cylinder – Head – Sector CRC – Cyclical Redundancy Check Interface register definition and descriptions •Reading this register shall not clear a pending interrupt. •This register contains begins when this register is •Command processing the same information as the Status written. register in the command block. •The content of the Command Block registers become parameters of the command when this register is written. •This register contains the command DMACK- is •This register shall only be written whencode being sent to the not asserted. device. Command execution begins immediately this this register take effect •The content ofafter register shallis written. when written. Interface register definition and .
