The universal serial communication interface (USCI) modules support multiple serial communication modes. Different USCI modules support different modes. | 11:56:01 Chapter 9 Serial communication interface 11:56:01 USCI Overview The universal serial communication interface (USCI) modules support multiple serial communication modes. Different USCI modules support different modes. The USCI_Ax modules support: • • • • UART mode. Pulse shaping for Infrared Data Association (IrDA) communications. Automatic baud rate detection for Local Interconnect Network (LIN) communications. Serial Peripheral Interface (SPI) mode. The USCI_Bx modules support: • • Inter-Integrated Circuit (I2C or I2 C) mode. SPI mode. Microcomputer principles and applications 11:56:01 UART Mode UART = Universal asynchronous receiver/transmitter. UART mode (UCSYNC bit=0) features include: • • • • • • • • • • 7- or 8-bit data with odd, even, or non-parity. Independent transmit and receive shift registers. Separate transmit and receive buffer registers. LSB-first or MSB-first data transmit and receive. Built-in idle-line and address-bit communication protocols for multiprocessor systems. Receiver start-edge detection for auto-wake up from LPMx modes. Programmable baud rate with modulation for fractional baud rate support. Status flags for error detection and suppression. Status flags for address detection. Independent interrupt capability for receive and transmit. Microcomputer principles and applications 11:56:01 UART Mode • • • • Start - Part of the serial interface’s job is to frame the bits of each data, using a start bit to indicate the start of the data. The start bit then serves to synchronize the sender and the receiver. Stop - Part of the serial interface’s job is to frame the bits of each data, using a stop bit for the end of the data. Baud rate - The start bit marks the beginning of the sender’s data. From the start bit the receiver can count clock ticks to determine when to read each data bit. The baud rate defines the time each bit exists or the time to wait between reading (or sending) each bit. A parity bit (or .
