The main contents of this chapter include all of the following: I/O basics; input from the keyboard; output to the monitor; a more sophisticated input routine; interrupt-driven I/O; implementation of memory-mapped I/O, revisited. | CSC 221 Computer Organization and Assembly Language Lecture 06: Machine Instruction Characteristics Lecture 05: Review Memory Access: Real Mode memory-addressing techniques. Protected Mode memory-addressing techniques. Memory Access: 64-bit Flat Memory model. Program-invisible registers in the 80286~Core2 microprocessors. Lecture Outline Instruction Set Instruction Format Instruction Cycle State Diagram Operation Types Operands Data Types Little and Big-Endian What is an Instruction Set? The complete collection of instructions that are understood by a CPU Machine Code Binary Usually represented by assembly codes 2 Simple Instruction Format The instruction is divided into fields, corresponding to the basic elements of the instruction. Instruction is read into an Instruction Register (IR) The CPU must be able to extract the data from the various instruction fields to perform the required operation. Opcode Operand(s) and/or Address(es) Elements of an Instruction Operation code (Op code) | CSC 221 Computer Organization and Assembly Language Lecture 06: Machine Instruction Characteristics Lecture 05: Review Memory Access: Real Mode memory-addressing techniques. Protected Mode memory-addressing techniques. Memory Access: 64-bit Flat Memory model. Program-invisible registers in the 80286~Core2 microprocessors. Lecture Outline Instruction Set Instruction Format Instruction Cycle State Diagram Operation Types Operands Data Types Little and Big-Endian What is an Instruction Set? The complete collection of instructions that are understood by a CPU Machine Code Binary Usually represented by assembly codes 2 Simple Instruction Format The instruction is divided into fields, corresponding to the basic elements of the instruction. Instruction is read into an Instruction Register (IR) The CPU must be able to extract the data from the various instruction fields to perform the required operation. Opcode Operand(s) and/or Address(es) Elements of an Instruction Operation code (Op code) Do this Specifies the operation to be performed ( ADD, SUB, I/O). Source Operand reference To this The operation may involve one or more source operands, that is, operands that are inputs for the operation. Result Operand reference Put the answer here The operation may produce a result. Next Instruction Reference When done that, do this. It tells the CPU where to fetch the next instruction after the execution of this instruction is complete. 3 Location of all the Operands Including source and result operands can be found: Main or virtual memory. Processor register- contains registers that can be used by machine instructions. Immediate- the operand value is being contained when the instruction is being executed. I/O devices- instruction specifies I/O module and device but if memory mapped then just another main or virtual memory address. 4 Instruction Length Affected by and affects: Memory size Memory organization - addressing Bus structure, . width CPU complexity
