Combined power ratio calculation, hadamard transform and lms based calibration of channel mismatches in time interleaved ADCs

his paper presents a method for all-digital background calibration of multiple channel mismatches including offset, gain and timing mismatches in time-interleaved analog-to-digital converters (TIADCs). The average technique is used to remove offset mismatch at each channel. | VNU Journal of Science Comp. Science amp Com. Eng Vol. 36 No. 2 2020 1-11 Original Article Combined Power Ratio Calculation Hadamard Transform and LMS-Based Calibration of Channel Mismatches in Time-Interleaved ADCs Van-Thanh Ta Van-Phuc Hoang Le Quy Don Technical University 236 Hoang Quoc Viet Str. Hanoi Vietnam Received 05 December 2019 Revised 14 March 2020 Accepted 07 May 2020 Abstract This paper presents a method for all-digital background calibration of multiple channel mismatches including offset gain and timing mismatches in time-interleaved analog-to-digital converters TIADCs . The average technique is used to remove offset mismatch at each channel. The gain mismatch is calibrated by calculating the power ratio of the sub-ADC over the reference ADC. The timing skew mismatch is calibrated by using Hadamard transform for error correction and LMS for timing mismatch estimation. The performance improvement of TIADCs employing these techniques is demonstrated through numerical simulations. Besides achievement results on the field-programmable gate array FPGA hardware have demonstrated the effectiveness of the proposed techniques. Keywords Time-interleaved analog-to-digital converter TIADC channel mismatches all-digital background calibration. 1. Introduction speed of TIADC increases M times compared to sub-ADC where M is the number of sub-ADCs Recently time-interleaved analog-to-digital used for time-interleaving 2-4 . However the converters TIADCs are known and widely performance of TIADCs is severely degraded used in high-speed wireless applications 1 . It by mismatches between sub-ADCs including uses M sub-ADCs that have a low sampling offset gain timing and bandwidth mismatches frequency to sample the analog input signal in a 4 5 . Therefore correcting these mismatches time-interleaving manner. The digital output of is a very essential requirement. sub-ADCs is then multiplexed together to form There have been several works on the digital output of TIADC. .

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