Switch Level Modeling part 2

[ Team LiB ] Examples In this section, we discuss how to build practical digital circuits, using switch-level constructs. CMOS Nor Gate Though Verilog has a nor gate primitive, let us design our own nor gate,using CMOS switches. | Team LiB Examples In this section we discuss how to build practical digital circuits using switch-level constructs. CMOS Nor Gate Though Verilog has a nor gate primitive let us design our own nor gate using CMOS switches. The gate and the switch-level circuit diagram for the nor gate are shown in Figure 11-4. Figure 11-4. Gate and Switch Diagram for Nor Gate Using the switch primitives discussed in Section Switch-Modeling Elements the Verilog description of the circuit is shown in Example 11-4 below. Example 11-4 Switch-Level Verilog for Nor Gate Define our own nor gate my_nor module my_nor out a b output out input a b internal wires wire c set up power and ground lines supplyl pwr pwr is connected to Vdd power supply supplyO gnd gnd is connected to Vss ground instantiate pmos switches pmos c pwr b pmos out c a instantiate nmos switches nmos out gnd a nmos out gnd b endmodule We can now test our nor gate using the stimulus shown below. stimulus to test the gate module stimulus reg A B wire OUT instantiate the my_nor module my_nor n1 OUT A B Apply stimulus initial begin test all possible combinations A 1 bO B 1 bO 5 A 1 bO B 1 bl 5 A 1 b1 B 1 bO 5 A 1 b1 B 1 b1 end check results initial monitor time OUT b A b B b OUT A B endmodule The output of the simulation is shown below. 0 OUT 1 A 0 B 0 5 OUT 0 A 0 B 1 10 OUT 0 A 1 B 0 15 OUT 0 A 1 B 1 Thus we designed our own nor gate. If designers need to customize certain library blocks they use switch-level modeling. 2-to-1 Multiplexer A 2-to-1 multiplexer can be defined with CMOS switches. We will use the my_nor gate declared in Section CMOS Nor Gate to implement the not function. The circuit diagram for the multiplexer is shown in Figure 11-5 below. Figure 11-5. 2-to-1 Multiplexer Using Switches The 2-to-1 multiplexer passes the input I0 to output OUT if S 0 and passes I1 to OUT if S 1. The switch-level description for the 2-to-1 multiplexer is shown in Example .

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463    20    1    27-11-2024
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