ARM Architecture Reference Manual- P2: The ARM instruction set architecture has evolved significantly since it was first developed, and will continue to be developed in the future. In order to be precise about which instructions exist in any particular ARM implementation, five major versions of the instruction set have been defined to date. | Introduction to the ARM Architecture Exception-generating instructions Two types of instruction are designed to cause specific exceptions to occur. Software interrupt instructions SWI instructions cause a software interrupt exception to occur. These are normally used to make calls to an operating system to request an OS-defined service. The exception entry caused by a SWI instruction also changes to a privileged processor mode. This allows an unprivileged task to gain access to privileged functions but only in ways permitted by the OS. Software breakpoint instructions BKPT instructions cause an abort exception to occur. If suitable debugger software is installed on the abort vector an abort exception generated in this fashion is treated as a breakpoint. If debug hardware is present in the system it can instead treat a BKPT instruction directly as a breakpoint preventing the abort exception from occurring. In addition to the above the following types of instruction cause an Undefined Instruction exception to occur coprocessor instructions which are not recognized by any hardware coprocessor most instruction words that have not yet been allocated a meaning as an ARM instruction. In each case this exception is normally used either to generate a suitable error or to initiate software emulation of the instruction. ARM DDI 0100E Copyright 1996-2000 ARM Limited. All rights reserved. A1-9 Introduction to the ARM Architecture A1-10 Copyright 1996-2000 ARM Limited. All rights reserved. ARM DDI 0100E Chapter A2 Programmer s Model This chapter introduces the ARM programmer s model. It contains the following sections Data types on page A2-2 Processor modes on page A2-3 Registers on page A2-4 General-purpose registers on page A2-5 Program status registers on page A2-9 Exceptions on pageA2-13 Memory and memory-mapped I O on page A2-22. ARM DDI 0100E Copyright 1996-2000 ARM Limited. All rights reserved. .
