Exercises 1: Create your own 2-input Verilog gates called my-or, my-and and my-not from 2-input nand gates. Check the functionality of these gates with a stimulus module. | Exercises 1 Create your own 2-input Verilog gates called my-or my-and and my-not from 2-input nand gates. Check the functionality of these gates with a stimulus module. 2 A 2-input xor gate can be built from my_and my_or and my_not gates. Construct an xor module in Verilog that realizes the logic function z xy x y. Inputs are x and y and z is the output. Write a stimulus module that exercises all four combinations of x and y inputs. 3 The 1-bit full adder described in the chapter can be expressed in a sum of products form. sum a . a .b .c_in .c_in c_out Assuming a b c_in are the inputs and sum and c_out are the outputs design a logic circuit to implement the 1-bit full adder using only and not and or gates. Write the Verilog description for the circuit. You may use up to 4-input Verilog primitive and and or gates. Write the stimulus for the full adder and check the functionality for all input combinations. 4 The logic diagram for an RS latch with delay is shown below. Write the Verilog description for the RS latch. Include delays of 1 unit when instantiating the nor gates. Write the stimulus module for the RS latch using the following table and verify the outputs. 5 Design a 2-to-1 multiplexer using bufif0 and bufif1 gates as shown below. The delay specification for gates b1 and b2 are as follows Rise Fall Turnoff Min 1 3 5 Typ Max 2 3 4 5 6 7 Apply stimulus and test the output values. Team LiB Team LiB Continuous Assignments A continuous assignment is the most basic statement in dataflow modeling used to drive a value onto a net. This assignment replaces gates in the description of the circuit and describes the circuit at a higher level of abstraction. The assignment statement starts with the keyword assign. The syntax of an assign statement is as follows. continuous_assign assign drive_strength delay3 list_of_net_assignments list_of_net_assignments net_assignment net_assignment net_assignment net_lvalue expression .