Hardware and Computer Organization- P3:Today, we often take for granted the impressive array of computing machinery that surrounds us and helps us manage our daily lives. Because you are studying computer architecture and digital hardware, you no doubt have a good understanding of these machines, and you’ve probably written countless programs on your PCs and workstations. | Chapter 2 value around 10 ohms as the voltage on the gate relative to the source increases. In real terms the amount that the voltage on the gate has to vary to cause this dramatic change is exactly the voltage swing from logic 0 to logic 1. As far as our electrical circuit analogy of Figure is concerned this is equivalent to closing the switch as we raise the voltage on the gate. As you can see the p-channel device behaves in a similar manner as the voltage on the gate becomes more negative then the voltage of the source. In other words it exhibits complementary behavior. Now we can finally put this all together and understand CMOS gates in general and Figure in particular. Refer back to Figure . Recall that this is a NOT gate. Let s see why. Assume that the voltage on the gate is a logic 0. The n-type transistor is essentially an open switch. The resistance is extremely high because VGS is nearly zero . However the complementary device the p-type device has a very low resistance because the voltage on the gate is much lower then the voltage of the source -VGS is large . This is the closed switch of Figure . Thus at the output of the gate we see a low resistance closed switch to logic 1 and a high resistance open switch to logic 0 and the output of the gate is logic 1. So when the input to the gate is logic 0 the output from the gate is logic 1. You should be able to analyze the complementary situation for an input of logic level 1. So we can summarize the behavior of the CMOS NOT gate as follows. When the input is at logic 0 the output sees the power supply voltage or logic 1. When the input is logic 1 the output sees the ground reference voltage or logic 0. Figure illustrates the electrical behavior of MOS transistors. Consider the N-channel device on the right-hand side of the graph. As the voltage on the gate measured relative to the source Vgs becomes higher or more positive the electrical resistance between the drain and the source .
