Hardware and Computer Organization- P13:Today, we often take for granted the impressive array of computing machinery that surrounds us and helps us manage our daily lives. Because you are studying computer architecture and digital hardware, you no doubt have a good understanding of these machines, and you’ve probably written countless programs on your PCs and workstations. | Chapter 12 or mA flowing through a 1000 ohm resistor. This gives us a voltage of volts. Thus a digital code from 0 to F will give us an analog voltage out from 0 to volts in steps of volts. Now we re ready to understand how real A D converters actually work. Figure is a simplified diagram of a 16-bit analog to digital converter. At it s heart is a 16-bit D A converter and a comparator. The operation of the circuit is very straightforward. We start by applying the digital code 0000 to the D A converter. The output of the D A Vout Vx TEST Figure A 16-bit single ramp analog to digital converter. converter is 0 volts. The output is applied to the minus input of the comparator. The voltage that we want to digitize is applied to the positive input of the comparator. We then add a count of 1 to the digital code and apply the 16-bit code to the D A converter. The output voltage will increase slightly because we have 65 534 codes to go. However we also check the output of the comparator to see if it changed from 1 to 0. When the comparator s output changes state then we know that the output voltage of the D A converter is just slightly greater than the unknown voltage. When it changes state we stop counting up and the digital code at the time the comparator changes state is the digital value of the unknown analog voltage. We call this a single-ramp A D converter because we increase the test voltage in a linear ramp until the test voltage and the unknown voltage are equal. Imagine that you were building a single ramp A D converter as part of a computer-based data logging system. You would have a 16-bit I O port as your digital output port and a single bit TEST input to sample the state of the comparator output. Starting from an initialized state you would keep incrementing the digital code and sampling the TEST input until you saw the TEST input go low. The flow chart of this algorithm for the single ramp A D is shown in Figure . The single .
