Hardware and Computer Organization- P16:Today, we often take for granted the impressive array of computing machinery that surrounds us and helps us manage our daily lives. Because you are studying computer architecture and digital hardware, you no doubt have a good understanding of these machines, and you’ve probably written countless programs on your PCs and workstations. | Chapter 16 Local Clocks The last future that I want to discuss is the concept of local clocks. Before we look at this phenomenon we should spend some time looking into the problem that we are trying to solve. First let s try to scope the problem. At this writing August 2004 the fastest microprocessor clock frequencies are approximately GHz. Predictions are that we will easily be at 5 GHz in the next year or so and that 10 GHz is not far behind. A 5 GHz clock rate corresponds to a clock period of 200 picoseconds ps . Since the speed of light is roughly 12 inches per nanosecond in free space and 6 inches per nanosecond through a wire this means that in 200 ps light can travel about inches. A modern microprocessor is about of an inch on a side so this means that 62 of the clock period will be wasted just getting the clock signal from one edge of the chip to the other. Since our microprocessor is a fully synchronous machine this is a very serious problem. We call this problem clock skew. Clock skew is simply the difference in time between corresponding portions of the clock phase difference because of the problems associated with simultaneously distributing the clock to all portions of the chip. In Teramac clock skew was a major design issue that had to be factored into all elements of the machine design. Also the original Cray supercomputer controlled clock skew by adjusting the lengths of the coaxial cables carrying the clock to various circuit boards in the machine. Another potential problem is that all transistors don t switch in exactly the same way. There can be slight differences in the switching characteristics of the clock circuitry at various portions of the chip. Measurements have shown these differences in switching characteristics to be as large as about 180 ps17. Thus as the chips get bigger and faster our ability to keep the clock uniformly distributed across the chip becomes more problematic. Today most clock distribution networks are .
