Standardized Functional Verification- P13

Standardized Functional Verification- P13:Every manager who brings a design to tape-out or who purchases IP must eventually face these questions. The ability to answer these questions based on quantitative analysis is both vital and yet elusive. In spite of the enormous technical advances made in IC development and verification software, the answers to these questions are still based largely on guesswork and hand waving. | Architecture for Verification Software 5 105 However there is one more step that typically precedes application of CRV tests that of initialization. Consider Fig. . Fig. . Saving initialized systems for CRV 106 Chapter 4 - Planning and Execution After a system has been initialized assigning values to all variables of condition and writing them into their respective registers in the target and in the context excitation with stimuli generated by the test generator begins. Substantial gains in efficiency can be made by avoiding the common preamble that activates and initializes the system. Simply dump the state of the system in a location accessible to all available simulation engines the simulation farm . Then as CRVjobs are dispatched to the networked simulation engines in the simulation farm this saved state is sent along as well. In Fig. the tasks within the rectangle labeled as Dispatcher would be handled typically by a main CRV script that sends jobs to each of a large number of simulation engines in the simulation farm. The remaining tasks are those executed on the individual engines in the farm. Of course if during the course of activation and initialization some faulty behavior is observed the resulting state will probably not be valid and should not be used for subsequent CRV tests. Instead the system state and all other necessary diagnostic data are saved for failure analysis. Another common practice that avoids unnecessary simulation cycles is the magical initialization of memory in the target s context and sometimes even in the target itself. Consider a processor example. A processor s cache control logic is not necessarily well-exercised by an extremely long loop that fills the cache and tests that are intended weighted to exercise the execution pipeline might simply be executed from some saved postactivation state and then magically in zero-time its cache is initialized with the program of interest. Architecture for Verification .

Không thể tạo bản xem trước, hãy bấm tải xuống
TÀI LIỆU MỚI ĐĂNG
Đã phát hiện trình chặn quảng cáo AdBlock
Trang web này phụ thuộc vào doanh thu từ số lần hiển thị quảng cáo để tồn tại. Vui lòng tắt trình chặn quảng cáo của bạn hoặc tạm dừng tính năng chặn quảng cáo cho trang web này.