Handbook of Algorithms for Physical Design Automation part 3 provides a detailed overview of VLSI physical design automation, emphasizing state-of-the-art techniques, trends and improvements that have emerged during the previous decade. After a brief introduction to the modern physical design problem, basic algorithmic techniques, and partitioning, the book discusses significant advances in floorplanning representations and describes recent formulations of the floorplanning problem. The text also addresses issues of placement, net layout and optimization, routing multiple signal nets, manufacturability, physical synthesis, special nets, and designing for specialized technologies. It includes a personal perspective from Ralph Otten as he looks back on. | 1 Introduction to Physical Design Charles J. Alpert Dinesh P. Mehta and Sachin S. Sapatnekar CONTENTS Overview of the Physical Design Overview of the Intended Note about INTRODUCTION The purpose of VLSI physical design is to embed an abstract circuit description such as a netlist into silicon creating a detailed geometric layout on a die. In the early years of semiconductor technology the task of laying out gates and interconnect wires was carried out manually . by hand on graph paper or later through the use of layout editors . However as semiconductor fabrication processes improved making it possible to incorporate large numbers of transistors onto a single chip a trend that is well captured by Moore s law it became imperative for the design community to turn to the use of automation to address the resulting problem of scale. Automation was facilitated by the improvement in the speed of computers that would be used to create the next generation of computer chips resulting in their own replacement The importance of automation was reflected in the scientific community by the formation of the Design Automation Conference in 1963 and both the International Conference on Computer-Aided Design and the IEEE Transactions on Computer-Aided Design in 1983 today there are several other conferences and journals on design automation. While the problems of scale have been one motivator for automation other factors have also come into play. Most notably improvements in technology have resulted in the invalidation of some critical assumptions made during physical design one of these is related to the relative delay between gates and the interconnect wires used to connect gates to each other. Initially gate delays dominated interconnect delays to such an extent that interconnect delay could essentially be ignored when computing the delay of a circuit. With technology scaling causing feature sizes .
