Verilog is a hardware description language. It was developed in the mid-1980s and later transferred to the IEEE (Institute of Electrical and Electronics Engineers). The language is formally defined by IEEE Standard 1364. The standard was ratified in 1995 (referred to as Verilog- 1995) and revised in 200 1 (referred to as Verilog-200 1). Many useful enhancements are added in the revised version. We use Verilog-2001 in this book. Verilog is intended for describing and modeling a digital system at various levels and is an extremely complex language. The focus of this book is on hardware design rather than the language. Instead of covering every aspect of. | FPGA PROTOTYPING BY VERILOG EXAMPLES PONG P. CHU WILEY FPGA PROTOTYPING BY VERILOG EXAMPLES This Page Intentionally Left .
