Ở mặt nạ đầu tiên quá trình quang khắc được thực hiện khá đơn giản: đặt phiến silicon lên gá, thiết lập các điều kiện cần thiết như chân không, khí nén, chế độ tiếp xúc, công suất UV, thời gian chiếu sáng và chiếu sáng. Tuy vậy để chế tạo một mạch tổ hợp người ta phải dùng tới nhiều bộ mặt nạ khác nhau. | This directed graph is formed by placing logic gates with externa inputs at the first level secondary logic gates at the next level and so on. Heuristics are then used to improve the organization by reducing the number of required levels if possible and to reduce the resulting layout area required. The layout density achieved with this method is about the same as that accomplished with gate array 112 structures. An important characteristic of the SLAP methodology is that general logic structures can be compiled directly into a geometrical layout whereas the PLA format forces a two-level logic realization. In this section four methods of generating layout from symbolic representations were introduced. Of the first two parameterized layout representation and parameterized module generation the second is growing in popularity for layout of today s designs. Graphical symbolic layout also enjoys success as a technique for layout of random logic. Synthesis of layout directly from the fourth symbolic form logic equations is fast becoming a widely used technique for generating integrated circuit layout COMPUTER CHECK PLOTS Generation of a layout plot from a geometrical specification file for an integrated circuit is often desirable. In the past large-scale plots some almost big enough to cover one end of a basketball court were generated so that visual checking of circuit layout could be performed. Most of these visual checks can now be performed directly from a computer-based geometrical specification tile without manual intervention. A computer program can verify fixed rules for the millions of geometrical figures used to describe VLSI circuits without tiring and without error a task that is essentially impossible for humans. However human capability to critique overall structure or to detect inconsistencies in an otherwise regular design is difficult to duplicate with computer-based checks. As a result hardcopy plots of integrated circuit designs are still used for .
