Ăn mòn - trong cộng nghệ vi điện tử trên cơ sở silicon là một kỹ thuật rất hay được sử dụng. Có hai phương pháp ăn mòn chính là : ăn mòn ướt và ăn mòn khô. | TIMING ANALYSIS For most digital circuits a very important parameter is the maximum rate at which the circuit can correctly process data. For microprocessors the processing speed is usually given in MIPS millions of instructions per second for scientific calculations the rate of execution is given in FLOPS floating-point operations per second and for logical inference machines the characteristic measure is LIPS logical inferences per second The execution rate of each of these machines is limited by parasitics and governed by its input clock. A primary goal in the design of a digital computing machine is to operate with the fastest possible input clock. Each digital integrated circuit has a maximum rate of operation. This rate of operation is limited by the output drive capability of its logic elements and by the capacitance and resistance of the loads they must drive. In a FSM finite-state machine the clocking rate is limited primarily by the longest path through its combinational logic section. For integrated circuits composed of large blocks of circuitry the maximum clocking rate may be limited by signal lines that must carry information between the blocks. The designer s task then is to find those paths tn an integrated circuit design that cause the maximum delay and then to modify the circuitry to minimize that delay. Finding the longest delay paths called critical paths for an integrated circuit is not a simple task. Until recently the most common technique for finding critical delays was for the designer to perform detailed circuit simulation on the paths that were suspected of contributing long delay times. Of course using circuit simulation for this task was not foolproof. Many times an unsuspected path that was not considered for simulation would limit the maximum clock speed. More recently computer programs have been designed specifically to seek out delay paths directly from the circuit definition without requiring simulation. This type of computer .
