Program describes input/output behavior of circuit, tell what you want to have happen, NOT what gates to connect to make it happen. | NATIONAL UNIVERSITY OF HO CHI MINH CITY UNIVERSITY OF INFORMATION TECHNOLOGY FACULTY OF COMPUTER ENGINEERING LECTURE Subjects VERILOG Hardware Description Language Chapter6 Behavioral Model - Combinational logic - Sequential logic Lecturer Lam Duc Khai 1 Agenda 1. Chapter 1 Introduction Weekl 2. Chapter 2 Fundamental concepts Week1 3. Chapter 3 Modules and hierarchical structure Week2 4. Chapter 4 Primitive Gates - Switches - User defined primitives Week2 5. Chapter 5 Structural model Week3 6. Chapter 6 Behavioral model - Combination circuit Sequential circuit Week4 Week5 7. Chapter 7 Tasks and Functions Week6 8. Chapter 8 State machines Week6 9. Chaper 9 Testbench and verification Week7 2 Agenda not finished yet 1. Combinational circuit 2. What and why behavior model 3. Operators 4. Behavior model in combinational circuit 1. Continuous assignment like Dataflow 2. Procedural assignment 1. Initial and Always blocks 2. Blocking assignment 3. Non-blocking assignment 4. Conditional statement if-else 5. Case statement 6. Looping statement for while 7. Block statement 3. Combinational synthesis