256 MB dual in-line memory module organized for a 64-bit word with 16 16M × 8-bit RAM chips (eight chips on each side of the DIMM). | Computer Architecture and Organization Miles Murdocca and Vincent Heuring Chapter 7 – Memory Chapter Contents The Memory Hierarchy Random-Access Memory Memory Chip Organization Case Study: Rambus Memory Cache Memory Virtual Memory Advanced Topics Case Study: Associative Memory in Routers Case Study: The Intel Pentium 4 Memory System The Memory Hierarchy Functional Behavior of a RAM Cell Static RAM cell (a) and dynamic RAM cell (b). Simplified RAM Chip Pinout A Four-Word Memory with Four Bits per Word in a 2D Organization A Simplified Representation of the Four-Word by Four-Bit RAM 2-1/2D Organization of a 64-Word by One-Bit RAM Two Four-Word by Four-Bit RAMs are Used in Creating a Four-Word by Eight-Bit RAM Two Four-Word by Four-Bit RAMs Make up an Eight-Word by Four-Bit RAM Single-In-Line Memory Module • 256 MB dual in-line memory module organized for a 64-bit word with 16 16M × 8-bit RAM chips (eight chips on each side of the DIMM). Single-In-Line Memory Module • Schematic diagram of 256 MB dual in-line memory module. (Source: adapted from .) A ROM Stores Four Four-Bit Words A Lookup Table (LUT) Implements an Eight-Bit ALU Flash Memory • (a) External view of flash memory module and (b) flash module internals. (Source: adapted from .) Cell Structure for Flash Memory • Current flows from source to drain when a sufficient negative charge is placed on the dielectric material, preventing current flow through the word line. This is the logical 0 state. When the dielectric material is not charged, current flows between the bit and word lines, which is the logical 1 state. Rambus Memory • Comparison of DRAM and RDRAM configurations. Rambus Memory • Rambus technology on the Nintendo 64 motherboard (left) enables cost savings over the conventional Sega Saturn motherboard design (right). • Nintendo 64 game console: Placement of Cache Memory in a Computer System • The locality . | Computer Architecture and Organization Miles Murdocca and Vincent Heuring Chapter 7 – Memory Chapter Contents The Memory Hierarchy Random-Access Memory Memory Chip Organization Case Study: Rambus Memory Cache Memory Virtual Memory Advanced Topics Case Study: Associative Memory in Routers Case Study: The Intel Pentium 4 Memory System The Memory Hierarchy Functional Behavior of a RAM Cell Static RAM cell (a) and dynamic RAM cell (b). Simplified RAM Chip Pinout A Four-Word Memory with Four Bits per Word in a 2D Organization A Simplified Representation of the Four-Word by Four-Bit RAM 2-1/2D Organization of a 64-Word by One-Bit RAM Two Four-Word by Four-Bit RAMs are Used in Creating a Four-Word by Eight-Bit RAM Two Four-Word by Four-Bit RAMs Make up an Eight-Word by Four-Bit RAM Single-In-Line Memory Module • 256 MB dual in-line memory module organized for a 64-bit word with 16 16M × 8-bit RAM chips (eight chips on each side of the DIMM). .
