The Spartan-3E family builds on the success of the earlier Spartan-3 family by increasing the amount of logic per I/O, significantly reducing the cost per logic cell. New features improve system performance and reduce the cost of configuration. These Spartan-3E FPGA enhancements, combined with advanced 90 nm process technology, deliver more functionality and bandwidth per dollar than was previously possible, setting new standards in the programmable logic industry. | X XILINX Spartan-3E FPGA Family Data Sheet DS312 August 26 2009 Product Specification Module 1 Module 3 Spartan-3E FPGA Family Introduction and Ordering Information DS312-1 August 26 2009 Introduction Features Architectural Overview Package Marking Ordering Information DC and Switching Characteristics DS312-3 August 26 2009 DC Electrical Characteristics - Absolute Maximum Ratings - Supply Voltage Specifications - Recommended Operating Conditions - DC Characteristics Switching Characteristics - I O Timing Module 2 - SLICE Timing Functional Description DS312-2 August 26 2009 Input Output Blocks IOBs - Overview - SelectIO Signal Standards Configurable Logic Block CLB Block RAM Dedicated Multipliers Digital Clock Manager DCM Clock Network Configuration Powering Spartan -3E FPGAs Production Stepping - DCM Timing - Block RAM Timing - Multiplier Timing - Configuration and JTAG Timing Module 4 Pinout Descriptions DS312-4 August 26 2009 Pin Descriptions Package Overview Pinout Tables Footprint Diagrams 2005-2009 Xilinx Inc. XILINX the Xilinx logo Virtex Spartan ISE and other designated brands included herein are trademarks of Xilinx in the United States and other coun- tries. All other trademarks are the property of their respective owners. DS312 August 26 2009 1 Spartan-3E FPGA Family Data Sheet XILINX0 2 DS312 August 26 2009 Product Specification fl XILINX Spartan-3E FPGA Family Introduction and Ordering Information DS312-1 August 26 2009 Product Specification Introduction The Spartan -3E family of Field-Programmable Gate Arrays FPGAs is specifically designed to meet the needs of high volume cost-sensitive consumer electronic applications. The five-member family offers densities ranging from 100 000 to million system gates as shown in Table 1. The Spartan-3E family builds on the success of the earlier Spartan-3 family by increasing the amount of logic per I O significantly reducing the cost per .
