Thiết bị ngoại vi & Kỹ thuật ghép nối - Chương 7

Tài liệu tham khảo bài giảng môn học Thiết bị ngoại vi & Kỹ thuật ghép nối - Mở đầu (Peripherals & Interfacing Technique)do Bùi Quốc Anh biên soạn - Chương 7 Micro controllers | Ch 7. Micro CONTROLLERS . Khái niệm 8 16 32 bit . Multi Purpose Intel 8051 80196 Clones Flash EPROM Data RAM DI DO AI AO Serial RS232 Timer Counter RTC wDt EEROM CMOS Ram iSP Jtag . Motorola 68HC11 Families BASIC 386 EX . Special RISC Atmel AVR-90 S 8535 Family Mega AVR Micro Chip PIC Family. DSP Texas Instrument TMS 32 F 240 Case study 1 Atmel 89C5x Features Compatible with MCS-51 Products 4K Bytes of In-System Reprogrammable Flash Memory - Endurance 1 000 Wrlte Erase Cycles Fully Static Operation 0 Hz to 24 MHz Three-Level Program Memory Lock 128 X 8-Blt Internal RAM 32 Programmable I O Lines Two 16-Blt Tlmer Counters Six Interrupt Sources Programmable Serial Channel Low Power Idle and Power Down Modes Description The AT89C51 is a low-power high-performance CMOS 8-bit microcomputer with 4K bytes of Flash Programmable and Erasable Read Only Memory PEROM . The device is manufactured using Atmel s high density nonvolatile memory technology and is compatible with the industry standard MCS-51 instruction set and pinout. The on-chip Flash allows the program memory to be reprogrammed in-system or by a conventional nonvolatile memory programmer. By combining a versatile 8-bit CPU with Flash on a monolithic chip the Atmel AT89C51 is a powerful microcomputer which provides a highly flexible and cost effective solution to many embedded control applications. 8-Bit Microcontroller with 4K Bytes Flash AT89C51 Case study 2 8 bit AVR RISC Features High-performance Low-power AVR 8-blt Microcontroller Advanced RISC Architecture - 130 Powerful Instructions - Moat single Clock Cycle Execution - 32 X 8 General Purpose Working Registers - Fully Static Operation - Up to 16 MIPS Throughput at 16 MHz - On-chlp 2-cycle Multiplier Nonvolatile Program and Data Memories - BK Bytes of In-System Self-Programmable Flash Endurance 10 000 WrIte Erase Cycles - Optional Boot Code Section with Independent Lock Bits In-Syatem Programming by On-chlp Boot Program True Read-While-Write .