Đây là loại bộ nhớ cache được biết đến như một bộ nhớ cache thống nhất. Một bộ nhớ cache thống nhất bao gồm cả hướng dẫn và giá trị dữ liệu. Các kiến trúc Harvard có hướng dẫn riêng biệt và xe buýt dữ liệu để cải thiện hiệu suất hệ thống tổng thể | Advanced DSP AND SIMD SUPPORT IN ARMv6 SIMD Arithmetic Operations Packing Instructions Complex Arithmetic Support Saturation Instructions Sum of Absolute Differences Instructions Dual 16-Bit Multiply Instructions Most Significant Word Multiplies Cryptographic Multiplication Extensions System and Multiprocessor Support Additions to ARMv6 Mixed-Endianness Support Exception Processing Multiprocessing Synchronization Primitives ARMv6 Implementations Future Technologies beyond ARMv6 TrustZone Thumb-2 Summary Chapter The Future OF the Architecture 15 John Rayfield In October 1999 ARM began to consider the future direction of the architecture that would eventually become ARMv6 first implemented in a new product called ARM1136J-S. By this time ARM already had designs for many different applications and the future requirements of each of those designs needed to be evaluated as well as the new application areas for which ARM would be used in the future. As system-on-chip designs have become more sophisticated ARM processors have become the central processors in systems with multiple processing elements and subsystems. In particular the portable and mobile computing markets were introducing new software and performance challenges for ARM. Areas that needed addressing were digital signal processing DSP and video performance for portable devices interworking mixed-endian systems such as TCP IP and efficient synchronization in multiprocessing environments. The challenge for ARM was to address all of these market requirements and yet maintain its competitive advantage in computational efficiency computing power per mW as the best in the industry. This chapter describes the components within ARMv6 introduced by ARM to address these market requirements including enhanced DSP support and support for a multiprocessing environment. The chapter also introduces the first .
