ARM System Developer’s Guide phần 10

nhưng hỗ trợ hai chuyến xe buýt yêu cầu hai cache. Trong lõi bộ xử lý sử dụng kiến trúc Harvard, có hai cache: Bộ nhớ cache sử dụng tài liệu tham khảo địa phương này lặp đi lặp lại trong cả thời gian và không gian. | 618 Appendix A ARM and Thumb Assembler Instructions 6. Rd Rn extend shifted_Rm 15 00 7. Ld extend Lm 07 00 8. Ld extend Lm 15 00 Notes If you specify the S prefix then extend x sign extends x. If you specify the U prefix then extend x zero extends x. Rd and Rm must not be pc. rot is an immediate in the range 0 to 3. TEQ Test for equality of two 32-bit values 1. TEQ cond Rn rotated_immed ARMv1 2. TEQ cond Rn Rm shift ARMv1 Action 1. Set the cpsr on the result of Rn A rotated_immed 2. Set the cpsr on the result of Rn A shifted_Rm Notes The cpsr is updated N Negative Z Zero C shifter_C see Table . If Rn or Rm is pc then the value used is the address of the instruction plus eight bytes. Use this instruction instead of CMP when you want to check for equality and preserve the carry flag. Example TEQ r0 1 test to see if r0 1 TST Test bits of a 32-bit value 1. TST cond Rn rotated_immed ARMvl Alphabetical List of ARM and Thumb Instructions 619 2. TST cond Rn Rm shift ARMvl 3. TST Ln Lm THUMBv1 Action 1. Set the cpsr on the result of Rn rotated_immed 2. Set the cpsr on the result of Rn shifted_Rm 3. Set the cpsr on the result of Ln Lm Notes The cpsr is updated N Negative Z Zero C shifter_C see Table . If Rn or Rm is pc then the value used is the address of the instruction plus eight bytes. Use this instruction to test whether a selected set of bits are all zero. Example TST r0 0xFF test if the bottom 8 bits of r0 are 0 UADD Unsigned parallel modulo add see the entry for SADD UHADD UHSUB Unsigned halving add and subtract see the entry for SHADD UMAAL Unsigned multiply accumulate accumulate long 1. UMAAL cond RdLo RdHi Rm Rs ARMv6 Action 1. RdHi RdLo unsigned Rm Rs unsigned RdLo unsigned RdHi Notes RdHi and RdLo must be different registers. RdHi RdLo Rm Rs must not be pc. This operation cannot overflow because 232 1 232 1 232 1 232 1 264 1 . You can use it to synthesize the multiword multiplications used by public key cryptosystems. 620 Appendix A ARM and Thumb .