Data Acquisition phần 5

Nhiều chương trình CAD hiện nay cho phép tạo ra các mô hình ba chiều để có thể nhìn từ mọi góc độ. Các chương trình CAD mô hình hóa vật thể đặc tiên tiến là một hệ thống thiết kế hiện thực ảo. Những mô hình đặc như vậy có thể được dùng làm cơ sở cho các phân tích phần tử hữu hạn (FEA) và / hoặc tính toán động lực dòng chảy (CFD) của thiết kế. Cho đến ứng dụng gia công với trợ giúp máy tính (CAM), những mô hình này cũng có thể được dùng. | Practical Considerations for Designing a Remotely Distributed Data Acquisition System 91 MCU clock use and distribution design MSP430 Clock Peripheral Speed Clock Source Comments MCLK MSP430F2169 8 MHz or 16 MHz XT2 crystal A central processing unit CPU clock. Preferred to run at 8 MHz to maximize data processing data transfers storage rate and communications. MCLK or ADC12OSC ADC12 8 MHz 16 MHz or 5 MHz with ADC12OSC XT2 crystal The actual rates affect sample and hold. Setup times are defined by the ADC12 registers. Review these carefully in the MCU documentation. This clock rate is not the same as the sample rate of ADC12. The ADC12 sample rate is dictated by sample and hold setup times and the Timer A1 interrupt rate as used in the firmware. SMCLK Timer A1 1 MHz MSP430 F2169 internal DCO Timer A1 is used for the overall sampling rate of ADC12 taking into consideration setup hold conversion times as discussed above. SMCLK UART 1 MHz MSP430 F2169 internal DCO The UART requires a fixed rate clock to get a 115 200-baud rate. The MCU and user interface are presently hardwired to a 115 200 baud rate. SMCLK ADS1240 1 MHz MSP430F2169 internal DCO The ADS1240 clock rate cannot be greater than 4 MHz however this clock can be locked at the lower 1 MHZ rate because sampling occurs at a low clock rate. Specifications indicate that the ADS1240 clock minimum is 1 MHz. SMCLK I2C 1 MHz MSP430 F2169 internal DCO Clock source selection is done in the I2C master initialization driver. It is presently set to SMCLK which is set to 1 MHz on the DCO. Table 2. Overview of the MCU clocks and their corresponding clock sources where MCLK is generated by an external XT2 crystal and SMCLK is generated by the internal digital controlled oscillator DCO . 92 Data Acquisition This section describes the use of the internal MCU clocks and the clock source defining which peripherals use which clocks and the desired clock rate settings of each. Given the difference in clock speeds for the .