Một mặt, vì thiết bị hiệu quả phụ thuộc rất nhiều vào lượng điện năng tiêu tan trong các thiết bị chính nó, một chiến lược có thể bao gồm giảm thiểu của nó có thể thu được bằng một hợp hình thành dạng sóng điện áp và hiện tại. như trong lớp E-thiết kế [14-18, 26]. Mặt khác, một cách tiếp cận khác nhau có thể cố gắng bằng cách cố gắng để tối đa hóa điện áp đầu ra cơ bản. | 188 POWER AMPLIFIERS On the one hand since device efficiency is strongly dependent on the amount of power dissipated in the device itself a possible strategy consists in its minimisation that could be obtained by a proper shaping of voltage and current waveforms. Because of the fact that pdiss depends on the product of the two waveforms in fact the shaping aims at avoiding or minimising the possibly overlapping regions. Moreover the requested waveform shaping can be realised by a proper output network design strategy that is properly and differently loading the harmonic content of the output current as in the Class-F or Class inverse-F approaches 4-10 or by a careful design of the output network both in lumped or in distributed form while using the active device as a pure switch as in Class-E design 14-18 26 . On the other hand quite a different approach may be attempted by trying to maximise the fundamental output voltage or current components implying therefore higher output power and efficiency while maintaining the DC power supplied to the amplifier at the same level. This aim can be obtained for instance by loading the active device with a purely resistive fundamental load that is resonating the reactive part of the output impedance 1 while using the harmonic content of the current or voltage in order to flatten the voltage or current waveform while approaching the device physical limitations that result in a potentially higher fundamental-frequency component and while allowing the overall output voltage to respect the above-mentioned limitations as it will be clarified in the next paragraphs . From a physical point of view the two briefly underlined strategies are not so different as it can be easily derived from power balance considerations. In fact starting from the following relation Pin PDC Pdiss Pout it is easy to reach the same conclusions following one of the two roadmaps for a given power supplied to the active device both from the DC bias supply
