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Báo cáo hóa học: " Research Article Efficient Integration of Pipelined IP Blocks into Automatically Compiled Datapaths Andreas Koch"

Tuyển tập báo cáo các nghiên cứu khoa học quốc tế ngành hóa học dành cho các bạn yêu hóa học tham khảo đề tài: Research Article Efficient Integration of Pipelined IP Blocks into Automatically Compiled Datapaths Andreas Koch | Hindawi Publishing Corporation EURASIP Journal on Embedded Systems Volume 2007 Article ID 65173 9 pages doi 10.1155 2007 65173 Research Article Efficient Integration of Pipelined IP Blocks into Automatically Compiled Datapaths Andreas Koch Embedded Systems and Applications Group Technical University of Darmstadt FB20 Hochschulstrafe 11 64289 Darmstadt Germany Received 14 May 2006 Revised 4 August 2006 Accepted 14 September 2006 Recommended by Juergen Teich Compilers for reconfigurable computers aim to generate problem-specific optimized datapaths for kernels extracted from an input language. In many cases however judicious use of preexisting manually optimized IP blocks within these datapaths could improve the compute performance even further. The integration of IP blocks into the compiled datapaths poses a different set of problems than stitching together IPs to form a system-on-chip though instead of the loose coupling using standard busses employed by SoCs the one between datapath and IP block must be much tighter. To this end we propose a concise language that can be efficiently synthesized using a template-based approach for automatically generating lightweight data and control interfaces at the datapath level. Copyright 2007 Andreas Koch. This is an open access article distributed under the Creative Commons Attribution License which permits unrestricted use distribution and reproduction in any medium provided the original work is properly cited. 1. INTRODUCTION Automatic high-level language compilers 1 2 are one of the prime means to make the compute power of reconfigurable computers available to developers. However despite the progress in such compile flows the generated hardware often does not reach the quality of designs carefully optimized by an expert designer. Thus it becomes desirable to tightly integrate optimized custom IP blocks with the compiler-generated datapath. While this mixed method is still new in the world of hardware design it has been .