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Báo cáo hóa học: " Multimedia Terminal System-on-Chip Design and Simulation Ivano Barbieri"

Tuyển tập báo cáo các nghiên cứu khoa học quốc tế ngành hóa học dành cho các bạn yêu hóa học tham khảo đề tài: Multimedia Terminal System-on-Chip Design and Simulation Ivano Barbieri | EURASIP Journal on Applied Signal Processing 2005 16 2694-2700 2005 Hindawi Publishing Corporation Multimedia Terminal System-on-Chip Design and Simulation Ivano Barbieri Department of Biophysical and Electronic Engineering University of Genova Via Opera Pia 11A 16146 Genova Italy Email ivano@dibe.unige.it Massimo Bariani Department of Biophysical and Electronic Engineering University of Genova Via Opera Pia11A 16146 Genova Italy Email bariani@dibe.unige.it Alessandro Scotto Department of Biophysical and Electronic Engineering University of Genova Via Opera Pia 11A 16146 Genova Italy Email scotto@dibe.unige.it Marco Raggio Department of Biophysical and Electronic Engineering University of Genova Via Opera Pia 11A 16146 Genova Italy Email raggio@dibe.unige.it Received 30 January 2004 Revised 30 March 2005 This paper proposes a design approach based on integrated architectural and system-on-chip SoC simulations. The main idea is to have an efficient framework for the design and the evaluation of multimedia terminals allowing a fast system simulation with a definable degree of accuracy. The design approach includes the simulation of very long instruction word VLIW digital signal processors DSPs the utilization of a device multiplexing the media streams and the emulation of the real-time media acquisition. This methodology allows the evaluation of both the multimedia algorithm implementations and the hardware platform giving feedback on the complete SoC including the interaction between modules and conflicts in accessing either the bus or shared resources. An instruction set architecture ISA simulator and an SoC simulation environment compose the integrated framework. In order to validate this approach the evaluation of an audio-video multiprocessor terminal is presented and the complete simulation test results are reported. Keywords and phrases system-on-chip multimedia HW-SW codesign DSP simulation VLIW. 1. INTRODUCTION Architecture achievements of the last years .