Đang chuẩn bị liên kết để tải về tài liệu:
Review PCI Express, SATA II and Silicon image 3132 (SI3132)

Không đóng trình duyệt đến khi xuất hiện nút TẢI XUỐNG Tải xuống

Review PCI Express, SATA II and Silicon image 3132 (SI3132) Introduction PCI Express (Bus Type, Clock Frequency, Peak Bandwidth, Slots per Bus) and SATA II; Silicon image 3132, PCI Express Aggregate Throughpu, Some system PCI express in PC. | Review PCI Express, SATA II and Silicon image 3132 (SI3132) • Introduction PCI Express and SATA II • Silicon image 3132 Engineer: HOA HOANG Introduction PCI express • PCI Express is the third generation high performance I/O bus used to interconnect peripheral devices in applications. The first generation buses include the ISA, EISA, VESA, and Micro Channel buses, second generation buses include PCI, AGP, and PCI-X. Bus Type Specification Release Date of Release PCI 33 MHz 2.0 1993 PCI 66 MHz 2.1 1995 PCI-X 66 MHz and 133 MHz 1.0 1999 PCI-X 266 MHz and 533 MHz 2.0 Q1, 2002 PCI Express 1.0 Q2, 2002 Table 1-1. Bus Specifications and Release Dates Introduction PCI express Bus Type Clock Frequency Peak Bandwidth [*] Number of Card Slots per Bus PCI 32-bit 33 MHz 133 MBytes/sec 4-5 PCI 32-bit 66 MHz 266 MBytes/sec 1-2 PCI-X 32-bit 66 MHz 266 MBytes/sec 4 PCI-X 32-bit 133 MHz 533 MBytes/sec 1-2 PCI-X 32-bit 266 MHz effective 1066 MBytes/sec 1 PCI-X 32-bit 533 MHz effective 2131 MByte/sec 1 Table 1-2. Comparison of Bus Frequency, Bandwidth and Number of Slots Introduction PCI express Bus Type Clock Frequency Peak Bandwidth [*] Number of Card Slots per Bus PCI 32-bit 33 MHz 133 MBytes/sec 4-5 PCI 32-bit 66 MHz 266 MBytes/sec 1-2 PCI-X 32-bit 66 MHz 266 MBytes/sec 4 PCI-X 32-bit 133 MHz 533 MBytes/sec 1-2 PCI-X 32-bit 266 MHz effective 1066 MBytes/sec 1 PCI-X 32-bit 533 MHz effective 2131 MByte/sec 1 Table 1-2. Comparison of Bus Frequency, Bandwidth and Number of Slots Introduction PCI express PCI Express Aggregate Throughput A PCI Express interconnect that connects two devices together is referred to as a Link. A Link consists of either x1, x2, x4, x8, x12, x16 or x32 signal pairs in each direction. These signals are referred to as Lanes. Aggregate bandwith numbers in Table 1-3 multiply 2.5 Gbits/sec by 2 (for each direction) PCI Express Link Width Aggregate .