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The 80x86 IBM PC and Compatible Computers- P15

The 80x86 IBM PC and Compatible Computers- P15: Praised by experts for its clarity and topical breadth, this visually appealing, one-stop source on PCs uses an easy-to-understand, step-by-step approach to teaching the fundamentals of 80x86 assembly language programming and PC architecture. Offering users a fun, hands-on learning experience, it uses the Debug utility to show what action the instruction performs, then provides a sample program to show its application. | Table 22-3 SRAM Access Time vs Cycle Time SRAM IDT Product Address Access tAA ns Read Cycle tRC ns IDT71258S25 . 25 25 IDT71258S35 35 . 35 IDT71258S45 45 45 TDT71258S25 70 70 Reprinted by permission of Integrated Device Technology Copyright IDT 1993 Example 22-3 Calculate the time to access 1024 random bits of a IMxl chip if tRC 85 ns and tRAC l 65 ns. Solution For standard mode also called random we have the following for reading 1024 bits time to read 1024 random bits 1024 x tRC 1024 x 165 ns 168 960 ns Example 22-4_ Show the time needed to access all 1024 memory locations of Example 22-3 if the interleaved method of memory interfacing is used. Solution In the interleaved method since the precharge time of one bank is hidden behind the access time of the other bank each memory location is accessed in tRAC as far as the CPU is concerned therefore 1024 x 85 87 040 ns is the total amount of time spent by the CPU to access 1024 locations. Set B Set A Ì I 000003 000007 00000B 000002 000006 OOOOOA 000001 000005 000009 000000 000004 000008 DP D15 D8 DP D7 DO DP I_ D15 D8 DP D7 DO Figure 22-2. Interleaved DRAM Organization Interleaved drawback The major drawback of interleaved memory is memory expansion. In expanding the memory based on the interleaved method a minimum of two sets of banks must be added every time additional memory is required. Look at Example 22-5. Many inexpensive personal computers based on 386SX 386DX and 486SX of 16 - 25 MHz frequency use the interleaved memory design method to avoid using expensive cache memory without sacrificing performance. Pleasd purchase PDF Split-Merge on www.verypdt.com to remove this watermark. SECTION 22.2 PAGE STATIC COLUMN AND NIBBLE MODE DRAMS 665 Example 22-5_ Assume that we are using IMxl DRAM organization in Figure 22-2. If each set is 4 megabytes find the .