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MEMORY, MICROPROCESSOR, and ASIC phần 2

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tín hiệu Ci và Cf để các Ri flip-flops và Rf được biểu thị và đầu vào và đầu ra tín hiệu dữ liệu respectively.The Ri và Rf được biểu hiện bằng Di, Qi, df và QF, tương ứng. Một phân tích của các thuộc tính thời gian của đường dẫn dữ liệu địa phương thể hiện trong hình. 1,14 được cung cấp trong các phần sau đây. | 1-20 Memory Microprocessor and ASIC FIGURE 1.14 A single-phase local data path. signal Ci and Cf to the flip-flops Rj and Rf are denoted by and Ô respectively. The input and output data signals to Ri and Rf are denoted by Di QiDf and Qf respectively. An analysis of the timing properties of the local data path shown in Fig. 1.14 is offered in the following sections. First the timing relationships to prevent the late arrival of data signals to Rf are examined in the next subsection. The timing relationships to prevent the early arrival of signals to the register Rf are then described followed by analyses that borrow some notation from Refs. 11 and 12. Similar analyses of synchronous circuits from the timing perspective can be found in Refs. 45 through 49. Preventing the Late Arrival of the Data Signal in a Local Data Path with Flip-Flops The operation of the local data path Rj Ạ Rf shown in Fig. 1.14 requires that any data signal that is being stored in Rf arrives at the data input Df of Rf no later than before the latching edge of the clock signal Cf It is possible for the opposite event to occur that is for the data signal Df not to arrive at the register Rf sufficiently early in order to be stored successfully within Rf. If this situation occurs the local data path shown in Fig. 1.14 fails to perform as expected and it is said that a timing failure or violation has been created. This form of timing violation is typically called a setup or long path violation. A setup violation is depicted in Fig. 1.15 and is used in the following discussion. The identical clock periods of the clock signals Cl and Cf are shaded for identification in Fig. 1.15. Also shaded in Fig. 1.15 are those portions of the data signals D Q and Df that are relevant to the operation of the local data path shown in Fig. 1.14. Specifically the shaded portion of Di corresponds to the data to be stored in Ri at the beginning of the fe-th clock period. This data signal propagates to the output of the