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Bài giảng Computer Organization and Architecture: Chapter 13

Bài giảng Computer Organization and Architecture: Chapter 13 - Reduced Instruction Set Computers hướng đến trình bày các vấn đề cơ bản về: Major Advances in Computers; The Next Step - RISC; Comparison of processors Driving force for CISC;. | William Stallings Computer Organization and Architecture 6th Edition Chapter 13 Reduced Instruction Set Computers Major Advances in Computers(1) The family concept IBM System/360 1964 DEC PDP-8 Separates architecture from implementation Microporgrammed control unit Idea by Wilkes 1951 Produced by IBM S/360 1964 Cache memory IBM S/360 model 85 1969 Major Advances in Computers(2) Solid State RAM (See memory notes) Microprocessors Intel 4004 1971 Pipelining Introduces parallelism into fetch execute cycle Multiple processors The Next Step - RISC Reduced Instruction Set Computer Key features Large number of general purpose registers or use of compiler technology to optimize register use Limited and simple instruction set Emphasis on optimising the instruction pipeline Comparison of processors Driving force for CISC Software costs far exceed hardware costs Increasingly complex high level languages Semantic gap Leads to: Large instruction sets More addressing modes . | William Stallings Computer Organization and Architecture 6th Edition Chapter 13 Reduced Instruction Set Computers Major Advances in Computers(1) The family concept IBM System/360 1964 DEC PDP-8 Separates architecture from implementation Microporgrammed control unit Idea by Wilkes 1951 Produced by IBM S/360 1964 Cache memory IBM S/360 model 85 1969 Major Advances in Computers(2) Solid State RAM (See memory notes) Microprocessors Intel 4004 1971 Pipelining Introduces parallelism into fetch execute cycle Multiple processors The Next Step - RISC Reduced Instruction Set Computer Key features Large number of general purpose registers or use of compiler technology to optimize register use Limited and simple instruction set Emphasis on optimising the instruction pipeline Comparison of processors Driving force for CISC Software costs far exceed hardware costs Increasingly complex high level languages Semantic gap Leads to: Large instruction sets More addressing modes Hardware implementations of HLL statements e.g. CASE (switch) on VAX Intention of CISC Ease compiler writing Improve execution efficiency Complex operations in microcode Support more complex HLLs Execution Characteristics Operations performed Operands used Execution sequencing Studies have been done based on programs written in HLLs Dynamic studies are measured during the execution of the program Operations Assignments Movement of data Conditional statements (IF, LOOP) Sequence control Procedure call-return is very time consuming Some HLL instruction lead to many machine code operations Relative Dynamic Frequency Dynamic Machine Instruction Memory Reference Occurrence (Weighted) (Weighted) Pascal C Pascal C Pascal C Assign 45 38 13 13 14 15 Loop 5 3 42 32 33 26 Call 15 12 31 33 44 45 If 29 43 11 21 7 13 GoTo - 3 - - - - Other 6 1 3 1 2 1 Operands Mainly local scalar variables Optimisation should concentrate on accessing local variables Pascal C Average Integer constant