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The VHDL Cookbook phần 4

Figure3-2. Kết cấu kiến trúc của ví dụ bộ xử lý. độc lập, với những ảnh hưởng duy nhất trên các khối khác cũng được xác định thông qua các giao diện của họ. 3.2.3. Tuyên bố thành phần một cơ thể kiến trúc cũng có thể làm cho việc sử dụng của các thực thể khác | 3. VHDL Describes Structure 3-5 architecture block_structure of processor is type data_path_control is . signal internal_control data_path_control begin control_unit block port clk in bit bus_control out proc_control bus_ready in bit control out data_path_control port map clk clock bus_control control bus_ready ready control internal_control declarations for control_unit begin statements for control_unit end block control_unit data_path block port address out integer data inout word_32 control in data_path_control port map address address data data control internal_control declarations for data_path begin statements for data_path end block data_path end block_structure Figure3-2. Structural architecture of processor example. independently with the only effects on other blocks being well defined through their interfaces. 3.2.3. Component Declarations An architecture body can also make use of other entities described separately and placed in design libraries. In order to do this the architecture must declare a component which can be thought of as a template defining a virtual design entity to be instantiated within the architecture. Later a configuration specification see Section3.3 can be used to specify a matching library entity to use. The syntax of a component declaration is component_declaration component identifier local_generic_clause local_port_clause end component Some examples of component declarations component nand3 generic Tpd Time 1 ns port a b c in logic_level y out logic_level end component 3-6 The VHDL Cookbook component read_only_memory generic data_bits addr_bits positive port en in bit addr in bit_vector depth-1 downto 0 data out bit_vector width-1 downto 0 end component The first example declares a three-input gate with a generic parameter specifying its propagation delay. Different instances can later be used with possibly different propagation delays. The second example declares a readonly memory component with address depth and data width .