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So sánh kiến trúc Bus Wishbone và Amba Axi

Bài viết So sánh kiến trúc Bus Wishbone và Amba Axi trình bày so sánh hai loại kiến trúc bus phổ biến là bus WISHBONE và AMBA AXI (Advanced Microcontroller Bus Architecture Advanced eXtensible Interface) dựa trên mô hình hệ thống kết nối điểm - điểm bằng cách thực hiện mô phỏng và so sánh hiệu năng của chúng dựa trên thông số tài nguyên, công suất tiêu thụ của mỗi hệ thống. | JOURNAL OF TECHNOLOGY EDUCATION SCIENCE Ho Chi Minh City University of Technology and Education Website https jte.hcmute.edu.vn ISSN 1859-1272 Email jte@hcmute.edu.vn A Comparison of the Wishbone and Amba Axi Bus Architecture Nguyen Quang Anh Tuan Nguyen Van Tuan Vo Phan Man Dat Van Ba Huy Truong Quang Phuc Nguyen Ngo Lam Ho Chi Minh City University of Technology and Education Vietnam Corresponding author. Email 18161299@student.hcmute.edu.vn ARTICLE INFO ABSTRACT Received 4 7 2022 In the current trend of The Fourth Industrial Revolution System-on-chip SoC design plays an important role in embedded systems and is a leading Revised 19 7 2022 field of many industrial countries around the world. The rapid development of Accepted 19 8 2022 semiconductor technology makes it possible to integrate more and more components on a chip. Bus protocols were developed and used as a common Published 30 8 2022 interface for efficient interconnection of on-chip components reducing complexity energy consumption and manufacturing costs. In this paper KEYWORDS we compare two popular bus architectures WISHBONE and AMBA AXI System-on-Chip SoC Advanced Microcontroller Bus Architecture Advanced eXtensible Interface IP Core based on the point-to-point connection system model by performing simulation and comparing their performance based on resource parameters power WISHBONE Bus consumption of each system. Specifically the Point-to-Point connection AMBA AXI bus model of both buses will use a MASTER interface which is a DMA Direct Bus Architecture Memory Access connected to a SLAVE interface which is a RAM Random Access Memory . These interfaces are IP cores that can be used and reused for different applications and purposes. The results are verified through simulation with the software Xilinx Vivado 2019.1. So Sánh Kiến Trúc Bus Wishbone Và Amba Axi Nguyễn Quang Anh Tuấn Nguyễn Văn Tuấn Võ Phan Mẫn Đạt Văn Bá Huy Trương Quang Phúc Nguyễn Ngô Lâm Trường Đại học Sư phạm Kỹ thuật Tp. Hồ Chí .