là dễ dàng hơn nhiều để hiểu mà không cần sự trợ giúp của tài liệu hoặc ý kiến thậm chí còn mô tả. Xác định duy nhất loại bỏ các ghi nhớ (hoặc nhìn lên) nơi bit có vị trí và bit nó. Khi đọc mã, bằng cách sử dụng chỉ thị xác định tăng cường khả năng đọc của mục đích của các hướng dẫn trên các nguồn thông tin thực tế. | Simpo PDF Mei-ge and Split Unregistered Vereion-I http may be accessed incorrectly causing problems with subsequent reads. You should never use the instruction clrf GPIO Data is written to the most significant bit first which is probably backwards to most applications. Before any transfer a control byte has to be written. The control byte data is in the format 0b1010000R where R is the Read _Write byte indicating what is coming next . If this bit is set then a read of the EEPROM at the current address pointer will take place. If a write is to take place the read write bit is reset. After a byte is sent the SDA line is pulled low to indicate an acknowledgment ACK or just A in the bitstream representations below . This bit is set low as an acknowledgment when the operation has completed successfully. If the acknowledgment bit is high NACK it does not necessarily mean there was a failure if it is issued by the EEPROM then it indicates a previous write has not completed. The PIC microcontroller will issue the acknowledgment to stop the EEPROM from preparing to send additional bytes out of its memory in a multibyte read. There are five operations that can be carried out with the EEPROM that is built into the PIC12CE5xx. They are 1 Current address set 2 Current address set data byte write 3 Data byte read at current address 4 Sequential multibyte read at current address 5 Write completion poll The EEPROM in the PIC12CE5xx is only 16 bytes in size. Each byte is accessed using a 4-bit address. This address is set using a control byte with the R bit reset followed by the address. The bitstream looks like this idle Start 1010000A 0000addrA DataByteA Stop - idle In the second byte sent the 0b00000addr pattern indicates that the four addr address bits become the address to set the EEPROM s internal address pointer to for subsequent operations. After the 2 bytes have been sent the SCL and SDA lines are returned to IDLE for three cycles using the instruction .
